Simulation of 16 bit ALU using Verilog-hdl


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Original Article

Author :

Mayank Mittal

Volume :

2

Issue :

1

Abstract :

In many digital circuits ALU is a basic building block. It can be used in integer arithmetic computations and as Complex operation. This research paper is based on the simulation of 16 bit ALU using VHDL. The design was implemented using VHDL Xilinx Synthesis tool ISE and targeted for Spartan device. An ALU performs following operations '“ Addition, subtraction, multiplication, Not, logical shift right, logical shift left, rotate right, rotate left, OR, AND, XOR, NAND, NOR, XNOR and comparison between two signals. Mayank Mittal"Simulation of 16 bit ALU using Verilog-hdl" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-1 , December 2017, URL: http://www.ijtsrd.com/papers/ijtsrd5876.pdf http://www.ijtsrd.com/engineering/electronics-and-communication-engineering/5876/simulation-of-16-bit-alu-using-verilog-hdl/mayank-mittal

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