Abstract :
A binary Golay code is a type of linear error correcting code used in digital communications. The two binary Golay codes formats are the Binary Golay Code 23 bit, G23 and Extended Binary Golay code 24 bit, G24 . The Golay code encodes 12 bits of data in such a way that it can correct 3 bits of error and detect 7 bits of error. G24 code is also called the Perfect Binary Golay Code. In standard code notation the codes have parameters 24, 12, 8 and 23, 12, 7 , corresponding to the length of the codeword, the dimension of the code, and the minimum hamming distance between two codeword. An efficient implementation in the area of FPGA by using both Golay code G23 and extended Golay code G 24 can be done by the help of different approaches of the encoding algorithm realizations. High speed with low latency and less complexity in the design is the major concern at the time of working on FPGA. This paper presents a review on the various works performed by scholars on the design and implementation of Golay Code G23 and G24 . Mayanka Rai | Hema Singh "A Review of design of Binary Golay Code and Extended Binary Golay Code for error correction" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-3 , April 2018, URL: https://www.ijtsrd.com/papers/ijtsrd11426.pdf Paper URL: http://www.ijtsrd.com/engineering/electronics-and-communication-engineering/11426/a-review-of-design-of-binary-golay-code-and-extended-binary-golay-code-for-error-correction/mayanka-rai
Keyword :
FPGA, Operational Delay, Golay Code, CRC, Encoding, Decoding, hardware optimization