Abstract :
The effect of process variation PV on delay is a major reason to decay the performance in advanced technologies. The performance of front routing algorithms is determined with or without PV for different traffic patterns. The saturation throughput and average message delay are used as performance metrics to evaluate the throughput. PV decreases the saturation throughput and increases the average message delay. Adaptive routing algorithm should be manipulated with the PV. A novel PV delay and congestion aware routing PDCR algorithm is presented for asynchronous network on chip NOC design. The routing algorithm performs various adaptive routing algorithms in the average delay and saturation throughput for different traffic patterns. A low power content addressable memory CAM by a new algorithm is proposed for associativity between the input tag and the corresponding address of the output data. The proposed architecture is depends on a recently developed sparse clustered network by utilizing binary connections that on average eliminates most of the parallel comparisons performed during a search. P. Mounica | R. Umamaheswari | R. Madhavi | R. Nischala | N. Ramesh Babu "Design A Congestion Aware Routing Algorithm for Synchronous Cam Design" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-3 , April 2018, URL: https://www.ijtsrd.com/papers/ijtsrd11547.pdf Paper URL: http://www.ijtsrd.com/engineering/electronics-and-communication-engineering/11547/design-a-congestion-aware-routing-algorithm-for-synchronous-cam-design/p-mounica
Keyword :
Asynchronous design, congestion, network on chip (NoC), process variation (PV), routing algorithms